BlogHide Resteemsseuic (25)in physical • 7 years agoPhysical Design Flow about PlacementBefore you do placement in ICC,ICC2 or other eda tools, you must have floorplan and powerplan.Also you have to fix all macros.In order to avoid too many pg drc especilly some base layer drcs,you…seuic (25)in clock • 7 years agoPhysical design expert guide you to build a robust clock treeClock tree synthesis (CTS) is at the heart of ASIC design and clock tree network robustness is one of the most important quality metrics of SoC design. With technology advancement happened over the…