A Bitcoin mining hardware accelerator is described. A System on Chip implementing a Bitcoin mining hardware accelerator may include a processor core and a hardware accelerator coupled to the processor core, the hardware accelerator to mine digital currency. The hardware accelerator may include a first computational block, including a message digest datapath, wherein the first computational block is to: precompute a first summation of a 32-bit message (W.sub.i), a 32-bit round constant (K.sub.i), and a content of a first shifted state register (G.sub.i-1), and store a result of the first summation in a state register (H.sub.i). The Bitcoin mining hardware accelerator may further include a second computational block comprising a message scheduler datapath.
|Source|Full details are in the source.
Authors get paid when people like you upvote their post.
If you enjoyed what you read here, create your account today and start earning FREE STEEM!
If you enjoyed what you read here, create your account today and start earning FREE STEEM!
Downvoting a post can decrease pending rewards and make it less visible. Common reasons:
Submit
Downvoting a post can decrease pending rewards and make it less visible. Common reasons:
Submit