The Coldware Bridge ETA?
When the first addition is performed by application of the balanced logic gate standard...
..we will have a fundamental unit of logic (EI, either) that can model transistorized digital logic to interpret instructions formulated for classical computation and perform them on an error corrected substrate of quantum mechanical states, Q-bits.
Specification 0.1 for implementation of balanced quantum logic gates (EI\AND).
Initialize error corrected Q-bit environment.
Q-Bitwise calculation by application of coupling and bias overlays. Values being calculated should remain in the form of Qbit states rather than being stored. If that rule is respected, the balanced logic gate implementation can scale to professional and scientific workloads.
Translation to and from classical computing environments by the more fundamental logic gate EI (either). Novel applications can interface existing platforms for computing, a two-way bridge between hardware and coldware.
I have found an implementation of code that uses Reverse Polish Notation for calculations... it is a functional example though it relies too heavily on the high-level declaration of variables stored in RAM.
If I can implement Reverse Polish Notation for performing the most fundamental and efficient type of calculations, bitwise operations can omit the convenient use of memory in favor of low latency and high-efficiency.
Not only does the extra effort of keeping the calculation in the form of Q-bit states spare memory and time, it will better accommodate higher-level code that needs an efficient low level interpreter and modeler of classical computing environments while allowing their advancement into the realm of quantum mechanical processing.
That is another consideration for EI (either) logic, if it is to provide most effective and scalable function. Each instruction should mind it's order in the stack rather than make work for storage, especially if it was an unnecessary measure to begin with. So much as one wasteful resource call means moving data off the CPU to bring it back again. This process unchecked can prevent the processing of much more data. Where unnecessary memory and datapath latencies are introduced, the advantages afforded by state of the art processors can be floundered for programmer or user-friendliness. At first, the EI logic should remain scientific and performance oriented ..the more human aspects are already appearing, such as in the name of the logic. Not so abstract, it is simply called Either.
The chassis of the abacus contains/stores the partially computed value.
Also of note, the beads or "units" of an abacus do not change order being removed from the set then reintroduced. It can be done but the motions would need to be mathematically accounted for and memorized/noted.
Zipping together the individual elements of sets can store information/logic .. similar to the abacus, we cannot dismantle the evolved logic unless we have notes/information to restore the set elements of origin. Similar to Merkle trees, for non-numerical data types (any variable type).
To tie all of this with perpendicular code ..we know that two sets such as a row and a column of information may be "zipped" together. Composite data derived from input sets of origin.
We can conjoin information to represent two parallel strands joined together. If we turn one of the two input streams perpendicular in relation to the other? ..or even a third scaling in relation to the others (cubed^3)?
What if conjoin is an intermediate evaluation of terms in relation to each other?
Hmm... Conjoin, that is similar to AND logic which includes two input streams as it's output.